Single board routing arrangement

ABSTRACT

A network router employs a single board architecture that includes both a forwarding engine and an interface card concentrator. All of the circuits involved in routing are incorporated into a single board, reducing the system cost of the router. A single processor performs various functions in connection with these circuits, such as management of interface cards and the forwarding engine. In addition to lowering the system cost, the compact architecture allows higher density installation of interface cards.

TECHNICAL FIELD

The invention relates to computer networks and, more particularly, tomanaging network routers.

BACKGROUND

A computer network is a collection of interconnected computing devicesthat exchange data and share resources. In a packet-based network, suchas the Internet, the computing devices communicate data by dividing thedata into small units called packets. The packets are individuallyrouted across the network from a source device to a destination device.The destination device extracts the data from the packets and assemblesthe data into its original form. Dividing the data into packets enablesthe source device to resend only those individual packets that may belost during transmission.

Devices within the network, often referred to as routers, forwardpackets through the network according to destination addresses in thepackets. To route packets through the network, a router maintains one ormore tables of routing information that describe available routesthrough the network. Each route defines a path between two locations onthe network. Upon receiving an incoming data packet, the router examinesheader information within the packet to identify the destination for thepacket. Based on the header information, the router performs a lookup inthe routing table (or a forwarding table derived from the routingtable), selects an appropriate route for the packet and forwards thepacket accordingly.

A router incorporates a number of hardware components to performfunctions such as packet forwarding and route updates. In onearchitecture, the router includes a routing engine and a packetforwarding engine. The routing engine maintains one or more routingtables and, based on the routing tables, creates a forwarding table thatdescribes how to forward an outbound data packet based on a destinationaddress associated with the outbound data packets. The routing enginesends this forwarding table to the packet forwarding engine, whichforwards packets between incoming and outgoing interfaces based onaddresses contained in the packets.

In particular, the packet forwarding engine performs a lookup in theforwarding table based on the destination address associated with thepacket and sends the packet out to the network using the appropriateoutgoing interface. The packet forwarding engine may perform otherfunctions, including, for example, filtering, sampling, policing, andrate limiting in connection with performing packet forwarding. In somearchitectures, hardware components for performing these and otherfunctions are implemented using application specific integrated circuits(ASICs) distributed across multiple modules. These modules include, forexample, a system control module, an interface card concentrator, andmultiple interface cards directly connected to the interface cardconcentrator.

Distributing the ASICs across multiple modules provides flexibility tothe user by allowing the user to purchase only as many interface cardconcentrators as needed. In addition, if a component, e.g., one of theASICs, fails, the router can be serviced relatively inexpensively byreplacing only the malfunctioning module. Because the interface cardsare directly connected to the interface card concentrator, however, theyare removed along with the concentrator before replacing theconcentrator.

The multiple module architecture offers certain advantages inflexibility and serviceability, but it also has some drawbacks. Forexample, the system cost of the router is relatively high. In addition,processors in the modules communicate with each other using, forexample, an Ethernet connection. While an Ethernet connection cancommunicate data at relatively high speeds, it still introduces somedelay into the system.

SUMMARY

The invention provides a packet forwarding architecture thatincorporates a system control module and an interface card concentratorinto a single hardware module. A forwarding engine includes applicationspecific integrated circuits (ASICs) for memory management, packetprocessing, and route lookup. A single processor performs variousfunctions in connection with the ASICs, such as management of interfacecards and the forwarding engine.

Integrating the ASICs and the processor into a single hardware modulerealizes a lower system cost, as well as a more compact and less complexarchitecture that allows interface cards to be installed with greaterdensity. The reduced number of components also offers greaterreliability. In addition, the single module architecture reduces theneed for communication between different hardware modules and delaysassociated with such inter-module communication. Code development may bemade more streamlined by reducing or eliminating coding of functionalitythat would otherwise be duplicated across multiple modules. Further,locating the ASICs in a single hardware module obviates the need toconnect the interface cards directly to the interface card concentrator,thereby allowing the hardware module to be serviced without removing theinterface cards and without disrupting their operation.

One embodiment of the invention is directed to a routing device thatincludes at least one interface module to communicate data packets usinga network. A router module manages the interface modules and forwardsdata packets to their destinations to be output on the network. Therouter module may include a forwarding engine that integrates a systemcontrol module and an interface module concentrator into a single unit.Data packets are received through interface modules that are connectedto the network. The interface module concentrator manages the interfacemodules by, for example, performing packet processing on data packetscommunicated with the network using the interface modules. The interfacemodule concentrator may also perform other functions, such as storingdata associated with inbound and/or outbound packets and managing memoryaccesses to read and write this data. The system control module forwardsthe data packets to their destinations to be output on the network. Amidplane may be coupled to the interface module or modules and to theforwarding engine. Alternatively, the interface module or modules can beconnected directly to the forwarding engine without the use of amidplane. A routing engine may also be connected directly to theforwarding engine.

In another embodiment, a routing device includes interface cards tocommunicate data packets using a network. A router module integrates apacket processing circuit, a memory management circuit, and a routelookup circuit into a single module. A midplane is coupled to the routermodule and to the interface cards. Alternatively, the interface moduleor modules can be connected directly to the forwarding engine withoutthe use of a midplane. A routing engine may also be connected directlyto the forwarding engine.

Other embodiments include routing arrangements that combine multiplesingle board routing devices into scalable routers capable ofcommunicating data with higher bandwidth, as well as methods ofmanufacturing such routing devices and routing arrangements. Yet anotherembodiment is directed to a router comprising one hardware board thatintegrally houses a packet processing circuit, a memory managementcircuit, and a route lookup circuit.

The above summary of the invention is not intended to describe everyembodiment of the invention. The details of one or more embodiments ofthe invention are set forth in the accompanying drawings and thedescription below. Other features, objects, and advantages of theinvention will be apparent from the description and drawings, and fromthe claims.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram illustrating an example network routerconsistent with the principles of the invention.

FIG. 2 is a block diagram illustrating a hardware implementation of anetwork router consistent with the principles of the invention.

FIG. 3 is a block diagram illustrating another hardware implementationof a network router consistent with the principles of the invention.

FIG. 4 is a flow diagram illustrating a mode of operation of a networkrouter consistent with the principles of the invention.

FIG. 5 is a timing diagram illustrating a power sequence of a networkrouter.

FIG. 6 is a block diagram illustrating a scalable router arrangementconsistent with the principles of the invention.

FIG. 7 is a diagram illustrating an example physical configuration of aredundant router arrangement consistent with the principle of theinvention.

DETAILED DESCRIPTION

A network router in accordance with the principles of the inventionemploys a single-board architecture that includes both a system controlmodule and one or more interface card concentrators. The router receivesdata packets using interface cards connected to a network. The systemcontrol module forwards these packets from the interface cards throughwhich they are received to their destinations based on selected routes.The interface card concentrator manages the interface cards by, forexample, performing packet processing on data packets communicated withthe network using the interface modules. The interface moduleconcentrator may also perform other functions, such as storing dataassociated with inbound and/or outbound packets and managing memoryaccesses to read and write this data.

All of the ASICs involved in routing are incorporated into a singleboard, reducing the number and complexity of components needed toimplement the router and, as a result, the system cost of the router.Reducing the number of components also improves the overall reliabilityof the router. With the interface card concentrator incorporated intothe board, the router can be serviced without removing the interfacecards. A single processor performs various functions in connection withthe ASICs, such as management of interface cards and the forwardingengine. Further, the compact architecture allows higher densityinstallation of interface cards. Integrating the system control moduleand the interface card concentrators into a single hardware module alsoreduces the need for communication between different hardware modulesand delays associated with such inter-module communication. Codedevelopment may be made more streamlined by reducing or eliminatingcoding of functionality that would otherwise be duplicated acrossmultiple modules.

FIG. 1 is a block diagram illustrating an example network router 10 inaccordance with the principles of the invention. Network router 10receives and forwards data packets across a network. As shown in FIG. 1,router 10 includes a routing engine 14 and a forwarding engine 16.Router 10 also includes one or more interface cards (IFCs) 18 forreceiving and sending data packets via network links 20 and 22,respectively. Forwarding engine 16 routes inbound packets received frominbound link 20 to the appropriate outbound link 22 or to routing engine14. Forwarding engine 16 routes packets according to routing informationstored in a forwarding table 23.

Routing engine 14 maintains and updates the routing information withinrouting table 21 and propagates the route information to forwardingtable 23. Upon receiving an inbound packet, forwarding engine 16examines information within the packet to identify the destination ofthe packet. Based on the destination, forwarding engine 16 selects anavailable route from forwarding table 23 and forwards the packet to oneof the IFCs 18.

FIG. 2 is a block diagram illustrating a hardware implementation of anetwork router 200 consistent with the principles of the invention.Network router 200 receives and sends data packets via network links 202and 204, respectively, using interface cards (IFCs) 206 connected via apassive midplane 208, which also distributes power to IFCs 206. In theimplementation shown in FIG. 2, network router 200 includes up to eightIFCs 206, four of which are depicted. As indicated by the dashed lineson FIG. 2, an optional redundant network router provides backup in casenetwork router 200 needs to be replaced. If the redundant network routeris used, both network router 200 and the redundant network router areconnected to IFCs 206 via midplane 208. A control signal is used toswitch control from network router 200 to the redundant network routerwithout disrupting the operation of IFCs 206.

An interface card concentrator 205 manages the IFCs by performing packetprocessing on inbound and outbound data packets communicated via IFCs206. The interface card concentrator 205 may perform additionalfunctions related to communicating data packets to and from IFCs 206,including, for example, storing the data packets in memory 212. In theembodiment shown in FIG. 2, the interface card concentrator 205 includestwo packet processing ASICs 210 that process data received through IFCs206 and assemble outbound packets for sending through IFCs 206, asdescribed more fully below. Each packet processing ASIC 210 can processinbound and outbound data for up to four IFCs 206. In connection withassembling outbound packets, each packet processing ASIC 210 reads datafrom memory 212. Memory 212 can be implemented using, for example, aconventional SDRAM device.

Memory management ASICs 214 and 216 coordinate memory accesses by packetprocessing ASICs 210. When router 200 receives a packet through anetwork link 202, memory management ASIC 216 writes data to memory 212associated with packet processing ASICs 210. When a packet is assembledand sent, memory management ASIC 214 reads data from memory 212associated with packet processing ASICs 210.

A route lookup ASIC 218 performs route lookup operations based onnotifications received from memory management ASIC 216 when a packet isreceived through a network link 202. Upon receiving an inbound packet,route lookup ASIC 218 examines information within the packet to identifythe destination of the packet. Based on the destination, route lookupASIC 218 selects an available route and forwards the packet to one ofthe IFCs 206 or to processor 220. Processor 220 forwards protocolpackets to routing engine 224 via an Ethernet connection 226. Routingengine 224 then updates a routing table 222 and propagates any routechanges to processor 220. Processor 220 then stores the selected routesin a forwarding table stored, for example, in a memory 228. Memory 228may be implemented using a conventional SRAM device.

FIG. 3 is a block diagram illustrating another hardware implementationof a network router 300 consistent with the principles of the invention.Network router 300 receives and sends data packets via network links 302and 304, respectively, using interface cards (IFCs) 306 connected, forexample, via a passive midplane 308. Alternatively, IFCs 306 may beconnected directly to router 300 without midplane 308. While networkrouter 300 of FIG. 3 includes four IFCs 306, fewer IFCs 306 may be used.As indicated by the dashed lines on FIG. 3, an optional redundantnetwork router provides backup in case network router 300 needs to bereplaced. If the redundant network router is used, both network router300 and the redundant network router are connected to IFCs 306 viamidplane 308. A control signal is used to switch control from networkrouter 300 to the redundant network router without disrupting theoperation of IFCs 306.

An interface card concentrator manages the IFCs by performing packetprocessing on inbound and outbound data packets communicated via IFCs306. The interface card concentrator may perform additional functionsrelated to communicating data packets to and from IFCs 306, including,for example, storing the data packets in memory 312. In the embodimentshown in FIG. 3, the interface card concentrator includes a packetprocessing ASIC 310 that processes data received through IFCs 306 andassembles outbound packets for sending through IFCs 306, as describedmore fully below. Packet processing ASIC 310 can process inbound andoutbound data for up to four IFCs 306. In connection with assemblingoutbound packets, packet processing ASIC 310 reads data from memory 312,which can be implemented using, e.g., a conventional SDRAM device.

Memory management ASICs 314 and 316 coordinate memory access with packetprocessing ASIC 310. When router 300 receives a packet through a networklink 302, packet processing ASIC 310 performs packet processing on theincoming packet, including removal of packet headers and isolation ofthe packet. Next, memory management ASIC 316 writes the processed packetcontents to memory 312 associated with packet processing ASIC 310. Whenpacket processing ASIC 310 prepares an outgoing data packet fortransmission using the network, memory management ASIC 314 reads thedata to be assembled into the outgoing packet from memory 312 associatedwith packet processing ASIC 310.

A route lookup ASIC 318 performs route lookup operation based onnotifications received from memory management ASIC 316 when a packet isreceived through a network link 302. Upon receiving an inbound packet,route lookup ASIC 318 examines information within the packet to identifythe destination of the packet. Based on the destination, route lookupASIC 318 selects an available route and forwards the packet to one ofthe IFCs 306 or to processor 320. Processor 320 forwards protocolpackets to routing engine 324 via an Ethernet connection 326. Routingengine 324 then updates a routing table 322 and propagates any routechanges to processor 320. Processor 320 then stores the selected routesin a forwarding table stored, for example, in a memory 328. Memory 328may be implemented using a conventional SRAM device.

FIG. 4 is a flow diagram illustrating a mode of operation of networkrouter 200 consistent with the principles of the invention. While thisdiscussion refers to various components of network router 200, it is tobe understood that network router 300 operates substantially similarly,with the exception that network router 300 uses only one packetprocessing ASIC 310 rather than the two packet processing ASICs 210 usedby network router 200.

When network router 200 receives data (402) via an interface card (IFC)206, the packet processing ASIC 210 associated with the receiving IFC206 performs inbound L2 and L3 packet processing on the received data(404). More particularly, packet processing ASIC 210 examines the L2 andL3 headers of the incoming packet and extracts the necessary parametersfrom them. Packet processing ASIC 210 can then remove the L2 headersfrom the packet. Next, memory management ASIC 216 distributes thecontents of the processed packet into the memory 212 associated withpacket processing ASICs 210 (406).

Memory management ASIC 216 also extracts a key from the processed packet(408). This key includes, for example, source and destination addressand port information associated with the packet. Based on the extractedinformation, memory management ASIC 216 creates a notification (410) andsends it to route lookup ASIC 218. Route lookup ASIC 218 uses severalkey engines (not shown in FIG. 2) to perform a longest prefix match onthe notification based on the key (412). Based on the results of thelongest prefix match, route lookup ASIC 218 sends the notification toprocessor 220, which in turn sends the notification to routing engine224 or to another memory management ASIC 214, which in turn sends thenotification to the selected packet processing ASIC 210.

Route lookup ASIC 218 analyzes the notification and, based on thecontents of forwarding table 228, determines the destination of thepacket (414), which is usually one of the IFCs 206. Occasionally, e.g.,when the packet relates to protocol, the packet is instead sent back torouting engine 224, which uses the packet to build routing table 222(416). Thus, some of the packets may be destined for router 200 itself,and not require forwarding.

In most cases, however, the packet is sent to memory management ASIC214, which notifies (418) the packet processing ASIC 210 associated withthe IFC 206 that was selected to send the packet via its outboundnetwork link 204. In response to this notification, packet processingASIC 210 reads the packet from memory 212 by issuing read commands tomemory management ASIC 216 and receiving the packet data from memorymanagement ASIC 214 (420). Packet processing ASIC 210 then performsoutbound packet processing (422). More particularly, packet processingASIC 210 analyzes the L2 descriptor information, builds an L2 header,and rewrites some of the L3 header information. Finally, packetprocessing ASIC 210 assembles the outbound packet and sends it to thenetwork via the selected outbound link 204 (424).

In one implementation, the single board network router uses tworedundant power supplies connected to the midplane, each having anoutput of 400 watts. The midplane distributes power to the IFCs andother components. FIG. 5 is a timing diagram illustrating an examplepower up sequence of the single board network router. Each power supplyprovides a bias voltage 502 of 5 V, as well as power signals of 1.5 V,2.5 V, 3.3 V, 5 V, and 12 V, denoted respectively at reference numerals504, 506, 508, 510, and 512. These power signals can be powered up orpowered down individually using an enable signal (not shown).Additionally, the 1.5 V, 2.5 V, 3.3 V, and 5 V power signals can bemargined using either sense lines from the single board router ordedicated lines on the power supply. Sense lines from the single boardrouter are used for precise regulation of the voltage.

After an enable signal 514 is asserted (516), the 1.5 V power signal 504is asserted after a delay of at least 3 seconds that is enforced by thepower supply. The other power signals are subsequently asserted one at atime, with delays of approximately 20 msec between assertion of powersignals. When the 12 V power signal 512 is asserted, a power supplyverification signal 518 becomes active.

Routing engine insertion signals, indicated at reference numerals 520and 522, are tied to ground pins at opposite ends of the router engineand, when in the low state, indicate that the routing engine, e.g.,routing engine 224 of FIG. 2, is properly and fully inserted before thepower supplies can be enabled. Both of these signals must be in the lowstate before the power supplies can be enabled. The signals can,however, be overridden by a jumper to allow the power supplies to beenabled without full insertion of the router engine for debuggingpurposes. In the particular timing sequence illustrated in FIG. 5, oneof the router engine insertion signals enters the high state (524),indicating that one end of the router engine has come out of fullinsertion. Consequently, power signals 504, 506, 508, 510, and 512,enable signal 514, and power supply verification signal 518 are turnedoff.

A power supply verification signal 526 originates from the power supplyand indicates its presence. This signal is used to gate enable signal514 so that a missing power supply will not be enabled. A groundedrouter insertion signal 528 originates on the single board router and isin the low state only when the single board router is fully and properlyinserted on the midplane. Router insertion signal 528 is also used togate enable signal 514 so that the power supply will not be enabled ifthe single board router is not fully and properly inserted on themidplane.

The software executed by the processor can also disable either or bothof the power supplies using a software enable signal 530.Software-initiated disabling of the power supplies may be necessary, forexample, when the software detects that a fan is not operating properly,or when the temperature exceeds a threshold.

The power up sequence is started by a boot circuit, which may beimplemented using a complex programmable logic device (CPLD). The bootcircuit may use a watchdog timer to restart the router when control ofthe single board router is lost. When control is lost, the watchdogtimer begins counting at prescribed intervals, for example, every 800microseconds. The timer is reset by a power-on reset. If the timer isnot reset within a certain time limit, various actions are taken toattempt to regain control.

In another embodiment of the invention depicted in FIG. 6, multiplesingle board network routers 602 are connected together using aconventional crossbar arrangement 604 to form a scalable routerarrangement 600 having a higher bandwidth. FIG. 6 shows four singleboard network routers 602 arranged in this way, but more or fewerrouters 602 can be used to scale the arrangement 600 to the bandwidthneeds of the particular application. Each single board network router602 can be implemented as network router 200 of FIG. 2 or network router300 of FIG. 3. Scalable router arrangement 600 can also incorporate oneor more other routers that may or may not use a single boardarchitecture.

In scalable router arrangement 600, incoming data is stored in a memory606 associated with the single board network router 602 that receivedthe data. Outbound data is forwarded to and stored in a memory 606associated with an appropriate destination router 602. Using aconventional switching arrangement (not shown), an interface card can beassociated with multiple, redundant single board network routers 602. Asa result, if one router 602 associated with an interface card fails, itcan be serviced without disrupting the operation of the interface cardby switching to a redundant router 602.

FIG. 7 is a diagram illustrating an example physical configuration of arouter arrangement 700. Interface cards 702 are connected to the frontend of a midplane 704. The rear end of midplane 704 is connected to asingle board network router 706, which may be implemented as networkrouter 200 of FIG. 2 or network router 300 of FIG. 3. Single boardnetwork router 706 may be implemented using a single printed circuitcard that interconnects the router components, including, for example,packet processing ASIC 210, memory management ASIC 216, and route lookupASIC 218 of FIG. 2. Router arrangement 700 may also include one or moreredundant network routers 708. As described above in connection withFIG. 6, if one router 706 fails, it can be serviced without disruptingthe operation of interface cards 702 by switching to redundant router708. IFCs and routers are connected via midplane 704 and a switch 701.An optional redundant switch 712 may be used to connect the IFCs androuters if switch 710 fails.

Router arrangement 700 may offer a number of benefits. For instance,because interface cards 702 are connected to the front of midplane 704and router 706 is connected to the rear of midplane 704, router 706 canbe serviced without removing interface cards 702. Serviceability isfurther improved with the use of redundant router 708.

As described above, the single board routing architecture may offerseveral advantages. For example, using a single processor to handle bothinterface card management and forwarding engine management eliminatesthe need for communication between several processors, thereby improvingprocessing speed. In addition, duplicate functionality is alsoeliminated. Space and cost efficiencies are realized by integrating allof the ASICs involved in routing into a single board. The improved spaceefficiency facilitates higher density installation of interface cards.Moreover, multiple routers can be combined for scalability and/orredundancy.

Various embodiments of the invention have been described. While someembodiments of the invention have been described in the context of asingle board architecture, the invention is not so limited. For example,the router may be implemented using a multiple board architecture inwhich all ASICs, with the exception of any ASICs contained in theinterface cards, are distributed among two or more boards, but are stillisolated from the interface cards by the midplane. Isolating theinterface cards from the other components using the midplane allows therouter to be serviced without removing the interface cards, and withoutdisrupting the operation of the interface cards. These and otherembodiments are within the scope of the following claims.

1. A routing device comprising: a midplane; a power supply coupled tothe midplane to supply power along the midplane; a plurality ofremovable interface cards removably coupled to the midplane tocommunicate packets using a network; and a router module removablycoupled to the midplane separate from the plurality of removableinterface cards, the router module comprising a packet forwardingengine, memory, a memory management unit, and an interface cardconcentrator module wherein the packet forwarding engine, memorymanagement unit, and the interface card concentrator module areintegrated into a single unit, wherein the midplane provides power fromthe power supply to the router module only when the router module isproperly inserted into the midplane, wherein the interface cardconcentrator module receives packets from at least two of the removableinterface cards, wherein contents of the received packets are stored inthe memory, wherein the memory management unit generates notificationsbased on keys of the received packets and forwards the notifications tothe packet forwarding engine, wherein the packet forwarding engineperforms route lookups for the packets based on the keys in response tothe notifications, and wherein the interface card concentrator modulesends the packets from the memory to the removable interface cards asoutput bound packets based on the route lookups performed by the packetforwarding engine in response to the notifications.
 2. The routingdevice of claim 1, wherein the interface card concentrator assembles theoutput bound packets from data stored in the memory and forwards theoutput bound packets to the plurality of removable interface cards. 3.The routing device of claim 1, wherein the interface card concentratorprocesses inbound packets received from the plurality of removableinterface cards to remove the keys from the inbound packets, and storesdata from the processed inbound packets in the memory.
 4. The routingdevice of claim 1, wherein the memory comprises an SDRAM device.
 5. Therouting device of claim 1, wherein the notifications are generated basedon extracted information that includes at least one of source addressinformation, destination address information, source port information,and destination port information.
 6. The routing device of claim 1,wherein the packet forwarding engine is configured to select the routesfor the packets received from the at least two different ones of theplurality of removable interface cards by referencing a forwarding tablebased on the extracted information, and wherein the forwarding tablestores the route information for forwarding data packets received fromany of the plurality of removable interface cards.
 7. The routing deviceof claim 6, further comprising a routing engine to store a routingtable.
 8. The routing device of claim 6, further comprising anothermemory to store the forwarding table.
 9. The routing device of claim 6,wherein the memory management unit is configured to forward the packetsto the plurality of removable interface cards based on the selectedroute.
 10. The routing device of claim 1, further comprising a redundantrouter module to process the data packets and to forward the datapackets between the removable interface cards in response to malfunctionof the router module.
 11. The routing device of claim 1, wherein thememory management unit is configured to provide packet data to thepacket processing circuit.
 12. The routing device of claim 1, whereinthe memory is further configured to store output bound data.
 13. Therouting device of claim 5, wherein the packet forwarding module isconfigured to select the route by performing a longest prefix matchbased on the extracted information.
 14. The routing device of claim 1,wherein the packet processing circuit is configured to remove an L2header from an incoming data packet.
 15. The routing device of claim 1,wherein the packet processing circuit is configured to build L2 headersfor the output bound packets.
 16. A routing arrangement comprising: acrossbar arrangement; and a plurality of routing devices coupled to thecrossbar arrangement, at least one routing device comprising: amidplane; a power supply coupled to the midplane to supply power alongthe midplane; a plurality of removable interface cards removably coupledto the midplane to communicate data packets using a network; and arouter module removably coupled to the midplane separate from theplurality of removable interface cards, wherein the midplane providespower to the router module from the power supply, only when the midplaneis properly inserted into the midplane, wherein the router moduleperforms route lookups for a first set of the data packets received fromthe network by a first one of the removable interface cards and for asecond set of the data packets received from the network by a second oneof the removable interface cards to select routes for the data packetsand to forward the data packets between the removable interface cards,wherein the router module comprises a system control module thatperforms the route lookups, memory, a memory management circuit, and atleast one concentrator module that receives the data packets from atleast the first one and the second one of the removable interface cards,and wherein the system control module, the memory arrangement circuit,and the concentrator module are integrated into a single unit, whereinthe router module receives packets from at least two of the removableinterface cards, wherein contents of the received packets are stored inthe memory, wherein the memory management circuit generatesnotifications based on keys of the received packets and forwards thenotifications to the system control module, wherein the system controlmodule performs route lookups for the packets based on the keys inresponse to the notifications, and wherein the concentrator module sendsthe packets from the memory to the removable interface cards as outputbound packets based on the route lookups performed by the system controlmodule in response to the notifications.
 17. The routing arrangement ofclaim 16, wherein the memory comprises an SDRAM device.
 18. The routingarrangement of claim 16, wherein the memory management circuit isfurther configured to provide the notifications to the system controlmodule based on information extracted from incoming data packets. 19.The routing arrangement of claim 18, wherein the extracted informationincludes at least one of source address information, destination addressinformation, source port information, and destination port information.20. The routing arrangement of claim 18, wherein the system controlmodule is configured to select a route by referencing a forwarding tablebased on the extracted information, wherein the forwarding table storesthe route information for forwarding data packets received from any ofthe plurality of removable interface cards.
 21. The routing arrangementof claim 20, further comprising a routing engine to store a routingtable.
 22. The routing arrangement of claim 20, further comprising amemory to store the selected route in the forwarding table.
 23. Therouting arrangement of claim 16, further comprising a redundant routermodule to process the data packets and to forward the data packetsbetween the interface modules in response to malfunction of the routermodule.
 24. The routing arrangement of claim 16, wherein the routermodule is configured to select the route by performing a longer prefixmatch based on the extracted information.
 25. The routing arrangement ofclaim 16, wherein the packet processing circuit is configured to removean L2 header from an incoming data packet.
 26. The routing arrangementof claim 16, wherein the packet processing circuit is configured tobuild L2 headers and rewrite L3 headers for the output bound packets.27. The routing arrangement of claim 16, further comprising a redundantrouter module to process the data packets and to forward the datapackets between the interface modules in response to malfunction of therouter module.
 28. A router comprising a midplane, a plurality ofinterface cards coupled to the midplane, a power supply to provide poweralong the midplane, and one hardware board integrally housing aninterface concentrator that provides electrical interfaces to connect tothe midplane to receive incoming packets from the plurality of interfacecards via the midplane, a packet processing circuit, memory, a memorymanagement circuit, and a route lookup circuit separate from theinterface cards to perform route lookups to select routes for a firstpacket and a second of the incoming packets received from a network bydifferent ones of the plurality of interface cards wherein the midplaneis configured to provide power to the one hardware board from the powersupply, only when the one hardware board is properly connected to themidplane at the electrical interfaces, wherein the interfaceconcentrator receives the data packets from at least two of theinterface cards, wherein contents of the received packets are stored inthe memory, wherein the memory management circuit generatesnotifications based on keys of the received data packets and forwardsthe notifications to the route lookup circuit, wherein the route lookupcircuit performs route lookups for the data packets based on the keys inresponse to the notifications, and wherein the interface concentratorsends the data packets from the memory to the interface cards as outputbound packets based on the route lookups performed by the route lookupcircuit in response to the notifications.
 29. The router of claim 28,wherein the memory management circuit is configured to provide incomingdata to the packet processing circuit.
 30. The router of claim 28,wherein the memory management circuit is configured to provide anotification to the route lookup circuit based on information extractedfrom the incoming data packets.
 31. The router of claim 30, wherein theextracted information includes at least one of source addressinformation, destination address information, source port information,and destination port information for each of the incoming packets. 32.The router of claim 30, wherein the route lookup circuit is configuredto select the routes by referencing a forwarding table based on theextracted information, wherein the forwarding table stores the routeinformation for forwarding data packets received from any of theplurality of interface cards.
 33. The router of claim 32, wherein theroute lookup circuit is configured to select the route by performing alongest prefix match based on the extracted information.
 34. The routerof claim 28, wherein the packet processing circuit is configured toremove an L2 header from an incoming data packet.
 35. The router ofclaim 28, wherein the packet processing circuit is configured to buildL2 headers and rewrite L3 headers for the output bound packets.
 36. Amethod of manufacturing a routing device, the method comprising:providing a plurality of interface modules to communicate data packetsusing a network; coupling a midplane to the plurality of interfacemodules; coupling a power supply to the midplane; and coupling a singlerouter module to the midplane; wherein the midplane is configured toprovide power to the single router module from the power supply, onlywhen the single router module is properly inserted into the midplane,wherein the router module is configured to perform route lookups fordata packets received from different ones of the interface modules viathe midplane to select routes for the packets in accordance with routeinformation associated with the network and forward the packets back tothe interface modules by way of the midplane, and wherein the routermodule comprises a system control module, memory, a memory managementunit, and at least one concentrator module integrated into a single unitseparate from the interface modules wherein the concentrator modulereceives the data packets from at least two of the interface cards,wherein contents of the received data packets are stored in the memory,wherein the memory management circuit generates notifications based onkeys of the received data packets and forwards the notifications to thesystem control module, wherein the system control module performs routelookups for the data packets based on the keys in response to thenotifications, and wherein the interface concentrator module sends thedata packets from the memory to the interface cards as output boundpackets based on the route lookups performed by the system controlmodule in response to the notifications.
 37. The method of claim 36,further comprising configuring the memory management circuit to providethe notifications to the system control module based on informationextracted from the incoming data packets.
 38. The method of claim 37,further comprising configuring the system control module to select aroute by referencing a forwarding table based on the extractedinformation, wherein the forwarding table stores the route informationfor forwarding data packets received from any of the plurality ofinterface modules.
 39. The method of claim 38, further comprisingconfiguring a routing engine to store a routing table.
 40. The method ofclaim 36, further comprising configuring a redundant router module toprocess the data packets and to forward the data packets between theinterface modules in response to malfunction of the router module.
 41. Amethod of manufacturing a routing arrangement, the method comprising:providing a crossbar arrangement; and coupling a plurality of routingdevices to the crossbar arrangement, at least one routing devicecomprising: a midplane; a plurality of interface cards to communicatedata packets using a network, wherein each of the plurality of interfacecards are coupled to the midplane; a power supply coupled to themidplane to supply power along the midplane; and a router moduleseparate from the plurality of interface cards to process the datapackets and to forward the data packets between the interface cards,wherein the router module is coupled to the midplane; wherein themidplane is configured to provide power to the router module from thepower supply, only when the router module is properly inserted into themidplane, wherein the router module is configured to perform routelookups for the data packets received from different ones of theinterface cards to select routes for the packets in accordance withroute information associated with the network, wherein the router moduleincludes a packet processing circuit, memory, a memory managementcircuit, and a route lookup circuit integrated into a single module,wherein the packet processing circuit receives the data packets from atleast two of the interface cards, wherein contents of the received datapackets are stored in the memory, wherein the memory management circuitgenerates notifications based on keys of the received data packets andforwards the notifications to the route lookup circuit, wherein theroute lookup circuit performs route lookups for the data packets basedon the keys in response to the notifications, and wherein the packetprocessing circuit sends the data packets from the memory to theinterface cards as output bound packets based on the route lookupsperformed by the route lookup circuit in response to the notifications.42. A routing arrangement comprising: a plurality of routing devicescoupled in a crossbar arrangement, at least one routing devicecomprising: a midplane; a plurality of interface modules removablycoupled to the midplane to communicate data packets using a network; apower supply coupled to the midplane to provide power along themidplane, a router module removably coupled to the midplane to receivethe data packets from at least two different ones of the interfacemodules, wherein the router module is configured to perform routelookups for the data packets received from the at least two interfacemodules to select routes for the packets in accordance with routeinformation associated with the network; wherein the midplane isconfigured to provide power to single router module from the powersupply, only when the router module is properly inserted into themidplane; and a switch arrangement coupled to the plurality of routingdevices and configured to switch control from a first routing device toa second routing device, wherein the router module includes a packetprocessing circuit, memory, a memory management circuit, and a routelookup circuit integrated into a single module, wherein the packetprocessing circuit receives the data packets from at least two of theinterface cards, wherein contents of the received data packets arestored in the memory, wherein the memory management circuit generatesnotifications based on keys of the received data packets and forwardsthe notifications to the route lookup circuit, wherein the route lookupcircuit performs route lookups for the data packets based on the keys inresponse to the notifications, and wherein the packet processing circuitsends the data packets from the memory to the interface cards as outputbound packets based on the route lookups performed by the route lookupcircuit in response to the notifications.
 43. The routing arrangement ofclaim 42, wherein each of the plurality of routing devices includes arespective router module comprising a respective packet processingcircuit, respective memory, a respective memory management circuit, anda respective route lookup circuit integrated into a respective singlemodule.